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| ? 1999 mos integrated circuit m m m m pd16732a, 16732b 384-output tft-lcd source driver (compatible with 64-gray scales) document no. s13972ej3v0ds00 (3rd edition) date published august 1999 ns cp(k) printed in japan data sheet the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all devices/types available in every country. please check with local nec representative for availability and additional information. the mark h shows major revised points. description the m pd16732a, 16732b are a source driver for tft-lcds capable of dealing with displays with 64-gray scales. data input is based on digital input configured as 6 bits by 6 dots (2 pixels), which can realize a full-color display of 260,000 colors by output of 64 values g -corrected by an internal d/a converter and 5-by-2 external power modules. because the output dynamic range is as large as v ss2 + 0.1 v to v dd2 C 0.1 v, level inversion operation of the lcds common electrode is rendered unnecessary. also, to be able to deal with dot-line inversion, n-line inversion and column line inversion when mounted on a single side, this source driver is equipped with a built-in 6-bit d/a converter circuit whose odd output pins and even output pins respectively output gray scale voltages of differing polarity. assuring a maximum clock frequency of 65 mhz when driving at 3.0 v, 45 mhz when driving at 2.3 v, this driver is applicable to xga-standard tft-lcd panels and sxga tft-lcd panels by input display signal 2 systems (clock divide). features ? cmos level input (2.3 v to 3.6 v) ? 384 outputs ? input of 6 bits (gradation data) by 6 dots ? capable of outputting 64 values by means of 5-by-2 external power modules (10 units) and a d/a converter (r-dac) ? high-speed data transfer: f max. = 65 mhz (internal data transfer speed when operating at v dd1 = 3.0 v) ? output dynamic range v ss2 + 0.1 v to v dd2 C 0.1 v ? apply for dot-line inversion, n-line inversion and column line inversion ? output voltage polarity inversion function (pol) ? display data inversion function (pol2) ? low power control function (lpc) ? logic power supply voltage (v dd1 ) : 2.3 v to 3.6 v ? driver power supply voltage (v dd2 ) : 8.5 0.5 v ? different point between m pd16732a, 16732b : the ladder resistors value(refer to 5. relationship between input data and output voltage value ) ordering information part number package m pd16732an- tcp (tab package) m pd16732bn- tcp (tab package) remark the tcps external shape is customized. to order the required shape, please contact an nec salesperson.
data sheet s13972ej3v0ds00 2 m m m m pd16732a, 16732b 1. block diagram sthl v dd1 v ss1 v dd2 v ss2 s 2 s 1 v 0 - v 9 pol d 00 - d 05 c 1 c 2 c 63 c 64 stb clk 64-bit bidirectional shift register data register latch level shifter d/a converter voltage follower output r,/l sthr d 10 - d 15 d 20 - d 25 s 3 s 384 pol2 d 30 - d 35 d 40 - d 45 d 50 - d 55 remark /xxx indicates active low signal. 2. relationship between output circuit and d/a converter s 1 s 2 s 383 6-bit d/a converter s 384 v 4 5 5 pol multi- plexer v 9 v 0 v 5 data sheet s13972ej3v0ds00 3 m m m m pd16732a, 16732b 3. pin configuration ( m m m m pd16732an-xxx, m m m m pd16732bn-xxx : tcp (tab package) ) s 384 s 383 sthl s 382 d 55 s 381 d 54 d 53 d 52 d 51 d 50 d 45 d 44 d 43 d 42 d 41 d 40 d 35 d 34 d 33 d 32 d 31 d 30 v dd1 r , /l v 9 v 8 v 7 v 6 v 5 v dd2 v ss2 bcont v 4 v 3 v 2 v 1 v 0 v ss1 lpc clk stb pol pol2 d 25 d 24 d 23 d 22 d 21 d 20 d 15 d 14 d 13 d 12 d 11 d 10 d 05 d 04 d 03 s 4 d 02 s 3 d 01 s 2 d 00 s 1 sthr copper foil surface remark this figure does not specify the tcp package. data sheet s13972ej3v0ds00 4 m m m m pd16732a, 16732b 4. pin functions (1/2) pin symbol pin name description s 1 to s 384 driver output the d/a converted 64-gray-scale analog voltage is output. d 00 to d 05 d 10 to d 15 d 20 to d 25 d 30 to d 35 d 40 to d 45 d 50 to d 55 display data input the display data is input with a width of 36 bits, viz., the gray scale data (6 bits) by 6 dots (2 pixels). d x0 : lsb, d x5 : msb r,/l shift direction control input these refer to the start pulse input/output pins when driver ics are connected in cascade. the shift directions of the shift registers are as follows. r,/l = h : sthr input, s 1 ? s 384 , sthl output r,/l = l : sthl input, s 384 ? s 1 , sthr output sthr right shift start pulse input/output r,/l = h : becomes the start pulse input pin. r,/l = l : becomes the start pulse output pin. sthl left shift start pulse input/output r,/l = h : becomes the start pulse output pin. r,/l = l : becomes the start pulse input pin. clk shift clock input refers to the shift registers shift clock input. the display data is incorporated into the data register at the rising edge. at the rising edge of the 64th clock after the start pulse input, the start pulse output reaches the high level, thus becoming the start pulse of the next-level driver. stb latch input the contents of the data register are transferred to the latch circuit at the rising edge. and, at the falling edge, the gray scale voltage is supplied to the driver. it is necessary to ensure input of one pulse per horizontal period. pol polarity input pol = l : the s 2nC1 output uses v 0 to v 4 as the reference supply. the s 2n output uses v 5 to v 9 as the reference supply. pol = h: the s 2nC1 output uses v 5 to v 9 as the reference supply. the s 2n output uses v 0 to v 4 as the reference supply. s 2n-1 indicates the odd output: and s 2n indicates the even output. input of the pol signal is allowed the setup time (t pol - stb ) with respect to stbs rising edge. pol2 data inversion pol2 = h : display data is inverted. pol2 = l : display data is not inverted lpc low power control input the current consumption is lowered by controlling the constant current source of the output amplifier. in low power mode (lpc = l), the v dd2 of static current consumption can be reduced to two thirds of the normal current consumption. this pin is pulled up to the v dd1 power supply inside the ic. lpc = h or open : normal power mode lpc = l : low power mode ? data sheet s13972ej3v0ds00 5 m m m m pd16732a, 16732b (2/2) pin symbol pin name description bcont bias control this pin can be used to finely control the bias current inside the output amplifier. in cases when fine-control is necessary, connect this pin to the stabilized ground potential (v ss2 ) via an external resistor of 10 to 100k w ( per ic ). when this fine-control function is not required, leave this pin open. refer to 9. current consumption reduction function v 0 to v 9 g -corrected power supplies input the g -corrected power supplies from outside by using operational amplifier. make sure to maintain the following relationships. during the gray scale voltage output, be sure to keep the gray scale level power supply at a constant level. v dd2 C 0.1 v> v 0 > v 1 > v 2 > v 3 > v 4 > v 5 > v 6 > v 7 > v 8 > v 9 > v ss2 + 0.1 v v dd1 logic power supply 2.3 v to 3.6 v v dd2 driver power supply 8.5 v 0.5 v v ss1 logic ground grounding v ss2 driver ground grounding cautions 1. the power start sequence must be v dd1 , logic input, and v dd2 & v 0 to v 9 in that order. reverse this sequence to shut down. (simultaneous power application to v dd2 and v 0 to v 9 is possible.) 2. to stabilize the supply voltage, please be sure to insert a 0.1 m m m m f bypass capacitor between v dd1 -v ss1 and v dd2 -v ss2 . furthermore, for increased precision of the d/a converter, insertion of a bypass capacitor of about 0.01 m m m m f is also advised between the g g g g -corrected power supply terminals (v 0 , v 1 , v 2 , , v 9 ) and v ss2 . data sheet s13972ej3v0ds00 6 m m m m pd16732a, 16732b 5. relationship between input data and output voltage value this product incorporates a 6-bit d/a converter whose odd output pins and even output pins output respectively gray scale voltages of differing polarity with respect to the lcds counter electrode (common electrode) voltage. the d/a converter consists of ladder resistors and switches. the ladder resistors (r0 to r62) are designed so that the ratio of lcd panel g -compensated voltages to v 0 to v 63 and v 0 to v 63 is almost equivalent. for the 2 sets of five g -compensated power supplies, v 0 to v 4 and v 5 to v 9 , respectively, input gray scale voltages of the same polarity with respect to the common voltage. when fine-gray scale voltage precision is not necessary, there is no need to connect a voltage follower circuit to the g -compensated power supplies v 1 to v 3 and v 6 to v 8 . figure 5 - 1 shows the relationship between the driving voltages such as liquid-crystal driving voltages v dd2 and v ss2 , common electrode potential v com , and g -corrected voltages v 0 to v 9 and the input data. be sure to maintain the voltage relationships of v dd2 C 0.1 v> v 0 > v 1 > v 2 > v 3 > v 4 > v 5 > v 6 > v 7 > v 8 > v 9 > v ss2 + 0.1 v. figures 5 - 2 and 5 - 3 show the relationship between the input data and the output data. this driver ic is designed for only single-sided mounting. therefore, please do not use it for g -corrected power supply level inversion in double-sided mounting. figure 5 - - - - 1. relationship between input data and g g g g - corrected power supply m m m m pd16732a m m m m pd16732b v dd2 v ss2 v 1 v 2 v 3 v 4 v com v 5 v 6 v 7 v 8 00 10 20 30 input data (hex) 3f 0.1 v v 9 0.1 v v 0 16 16 16 16 16 16 15 15 split interval v dd2 v ss2 v 1 v 2 v 3 v 4 v com v 5 v 6 v 7 v 8 00 10 20 30 input data (hex) 3f 0.1 v v 9 0.1 v v 0 16 16 16 16 16 16 15 15 split interval data sheet s13972ej3v0ds00 7 m m m m pd16732a, 16732b figure 5 - - - - 2. relationship between input data and output voltage (1/2) v dd2 C 0.1 v> v 0 > v 1 > v 2 > v 3 > v 4 > v 5 , pol2 = l data d x5 d x4 d x3 d x2 d x1 d x0 output voltage rn ( w ) 732a 732b 732a 732b 00h000000 v 0 'v 0 r0 800 1766 01h000001 v 1 'v 1 +(v 0 -v 1 ) 7250/8050 4585/6351 r1 750 736 02h000010 v 2 'v 1 +(v 0 -v 1 ) 6500/8050 3849/6351 r2 700 566 03h000011 v 3 'v 1 +(v 0 -v 1 ) 5800/8050 3283/6351 r3 650 509 04h000100 v 4 'v 1 +(v 0 -v 1 ) 5150/8050 2774/6351 r4 600 396 05h000101 v 5 'v 1 +(v 0 -v 1 ) 4550/8050 2378/6351 r5 550 340 06h000110 v 6 'v 1 +(v 0 -v 1 ) 4000/8050 2038/6351 r6 550 283 07h000111 v 7 'v 1 +(v 0 -v 1 ) 3450/8050 1755/6351 r7 500 283 08h001000 v 8 'v 1 +(v 0 -v 1 ) 2950/8050 1472/6351 r8 500 226 09h001001 v 9 'v 1 +(v 0 -v 1 ) 2450/8050 1246/6351 r9 400 226 0ah001010 v 10 'v 1 +(v 0 -v 1 ) 2050/8050 1020/6351 r10 400 170 0bh001011 v 11 'v 1 +(v 0 -v 1 ) 1650/8050 850/6351 r11 350 170 0ch001100 v 12 'v 1 +(v 0 -v 1 ) 1300/8050 680/6351 r12 350 170 0dh001101 v 13 'v 1 +(v 0 -v 1 ) 950/8050 510/6351 r13 350 170 0eh001110 v 14 'v 1 +(v 0 -v 1 ) 600/8050 340/6351 r14 300 170 0fh001111 v 15 'v 1 +(v 0 -v 1 ) 300/8050 170/6351 r15 300 170 10h010000 v 16 'v 1 r16 300 152 11h010001 v 17 'v 2 +(v 1 -v 2 ) 2450/2750 2280/2432 r17 250 152 12h010010 v 18 'v 2 +(v 1 -v 2 ) 2200/2750 2128/2432 r18 250 152 13h010011 v 19 'v 2 +(v 1 -v 2 ) 1950/2750 1976/2432 r19 250 152 14h010100 v 20 'v 2 +(v 1 -v 2 ) 1700/2750 1824/2432 r20 200 152 15h010101 v 21 'v 2 +(v 1 -v 2 ) 1500/2750 1672/2432 r21 200 152 16h010110 v 22 'v 2 +(v 1 -v 2 ) 1300/2750 1520/2432 r22 200 152 17h010111 v 23 'v 2 +(v 1 -v 2 ) 1100/2750 1368/2432 r23 150 152 18h011000 v 24 'v 2 +(v 1 -v 2 ) 950/2750 1216/2432 r24 150 152 19h011001 v 25 'v 2 +(v 1 -v 2 ) 800/2750 1064/2432 r25 150 152 1ah011010 v 26 'v 2 +(v 1 -v 2 ) 650/2750 912/2432 r26 150 152 1bh011011 v 27 'v 2 +(v 1 -v 2 ) 500/2750 760/2432 r27 100 152 1ch011100 v 28 'v 2 +(v 1 -v 2 ) 400/2750 608/2432 r28 100 152 1dh011101 v 29 'v 2 +(v 1 -v 2 ) 300/2750 456/2432 r29 100 152 1eh011110 v 30 'v 2 +(v 1 -v 2 ) 200/2750 304/2432 r30 100 152 1fh011111 v 31 'v 2 +(v 1 -v 2 ) 100/2750 152/2432 r31 100 152 20h100000 v 32 'v 2 r32 100 156 21h100001 v 33 'v 3 +(v 2 -v 3 ) 1500/1600 2340/2496 r33 100 156 22h100010 v 34 'v 3 +(v 2 -v 3 ) 1400/1600 2184/2496 r34 100 156 23h100011 v 35 'v 3 +(v 2 -v 3 ) 1300/1600 2028/2496 r35 100 156 24h100100 v 36 'v 3 +(v 2 -v 3 ) 1200/1600 1872/2496 r36 100 156 25h100101 v 37 'v 3 +(v 2 -v 3 ) 1100/1600 1716/2496 r37 100 156 26h100110 v 38 'v 3 +(v 2 -v 3 ) 1000/1600 1560/2496 r38 100 156 27h100111 v 39 'v 3 +(v 2 -v 3 ) 900/1600 1404/2496 r39 100 156 28h101000 v 40 'v 3 +(v 2 -v 3 ) 800/1600 1248/2496 r40 100 156 29h101001 v 41 'v 3 +(v 2 -v 3 ) 700/1600 1092/2496 r41 100 156 2ah101010 v 42 'v 3 +(v 2 -v 3 ) 600/1600 936/2496 r42 100 156 2bh101011 v 43 'v 3 +(v 2 -v 3 ) 500/1600 780/2496 r43 100 156 2ch101100 v 44 'v 3 +(v 2 -v 3 ) 400/1600 624/2496 r44 100 156 2dh101101 v 45 'v 3 +(v 2 -v 3 ) 300/1600 468/2496 r45 100 156 2eh101110 v 46 'v 3 +(v 2 -v 3 ) 200/1600 312/2496 r46 100 156 2fh101111 v 47 'v 3 +(v 2 -v 3 ) 100/1600 156/2496 r47 100 156 30h110000 v 48 'v 3 r48 100 175 31h110001 v 49 'v 4 +(v 3 -v 4 ) 3350/3450 4397/4572 r49 100 175 32h110010 v 50 'v 4 +(v 3 -v 4 ) 3250/3450 4222/4572 r50 100 175 33h110011 v 51 'v 4 +(v 3 -v 4 ) 3150/3450 4047/4572 r51 100 175 34h110100 v 52 'v 4 +(v 3 -v 4 ) 3050/3450 3872/4572 r52 100 175 35h110101 v 53 'v 4 +(v 3 -v 4 ) 2950/3450 3697/4572 r53 150 232 36h110110 v 54 'v 4 +(v 3 -v 4 ) 2800/3450 3465/4572 r54 150 232 37h110111 v 55 'v 4 +(v 3 -v 4 ) 2650/3450 3233/4572 r55 150 232 38h111000 v 56 'v 4 +(v 3 -v 4 ) 2500/3450 3001/4572 r56 200 232 39h111001 v 57 'v 4 +(v 3 -v 4 ) 2300/3450 2769/4572 r57 200 289 3ah111010 v 58 'v 4 +(v 3 -v 4 ) 2100/3450 2480/4572 r58 250 345 3bh111011 v 59 'v 4 +(v 3 -v 4 ) 1850/3450 2135/4572 r59 250 402 3ch111100 v 60 'v 4 +(v 3 -v 4 ) 1600/3450 1733/4572 r60 300 402 3dh111101 v 61 'v 4 +(v 3 -v 4 ) 1300/3450 1331/4572 r61 500 459 3eh111110 v 62 'v 4 +(v 3 -v 4 ) 800/3450 872/4572 r62 800 872 3fh111111 v 63 'v 4 rtotal 15850 15851 caution there is no connection between v 4 and v 5 terminal in the chip. v 0 ' v 17 ' v 1 ' v 47 ' v 2 ' v 48 ' v 3 ' v 49 ' v 15 ' v 16 ' v 63 ' v 61 ' v 62 ' r0 r17 r1 r47 r46 r2 r48 r3 r49 r14 r15 r16 r60 r61 r62 v 4 v 3 v 1 v 0 data sheet s13972ej3v0ds00 8 m m m m pd16732a, 16732b figure 5 - - - - 3. relationship between input data and output voltage (2/2) v 4 > v 5 > v 6 > v 7 > v 8 > v 9 > v ss2 + 0.1 v , pol2 = l data d x5 d x4 d x3 d x2 d x1 d x0 output voltage rn ( w ) 732a 732b 732a 732b 00h 000000 v 0 '' v 9 r0 800 1766 01h 000001 v 1 '' v 9 +(v 8 -v 9 ) 800/8050 1766/6351 r1 750 736 02h 000010 v 2 '' v 9 +(v 8 -v 9 ) 1550/8050 2502/6351 r2 700 566 03h 000011 v 3 '' v 9 +(v 8 -v 9 ) 2250/8050 3068/6351 r3 650 509 04h 000100 v 4 '' v 9 +(v 8 -v 9 ) 2900/8050 3577/6351 r4 600 396 05h 000101 v 5 '' v 9 +(v 8 -v 9 ) 3500/8050 3973/6351 r5 550 340 06h 000110 v 6 '' v 9 +(v 8 -v 9 ) 4050/8050 4313/6351 r6 550 283 07h 000111 v 7 '' v 9 +(v 8 -v 9 ) 4600/8050 4596/6351 r7 500 283 08h 001000 v 8 '' v 9 +(v 8 -v 9 ) 5100/8050 4879/6351 r8 500 226 09h 001001 v 9 '' v 9 +(v 8 -v 9 ) 5600/8050 5105/6351 r9 400 226 0ah 001010 v 10 '' v 9 +(v 8 -v 9 ) 6000/8050 5331/6351 r10 400 170 0bh 001011 v 11 '' v 9 +(v 8 -v 9 ) 6400/8050 5501/6351 r11 350 170 0ch 001100 v 12 '' v 9 +(v 8 -v 9 ) 6750/8050 5671/6351 r12 350 170 0dh 001101 v 13 '' v 9 +(v 8 -v 9 ) 7100/8050 5841/6351 r13 350 170 0eh 001110 v 14 '' v 9 +(v 8 -v 9 ) 7450/8050 6011/6351 r14 300 170 0fh 001111 v 15 '' v 9 +(v 8 -v 9 ) 7750/8050 6181/6351 r15 300 170 10h 010000 v 16 '' v 8 r16 300 152 11h 010001 v 17 '' v 8 +(v 7 -v 8 ) 300/2750 152/2432 r17 250 152 12h 010010 v 18 '' v 8 +(v 7 -v 8 ) 550/2750 304/2432 r18 250 152 13h 010011 v 19 '' v 8 +(v 7 -v 8 ) 800/2750 456/2432 r19 250 152 14h 010100 v 20 '' v 8 +(v 7 -v 8 ) 1050/2750 608/2432 r20 200 152 15h 010101 v 21 '' v 8 +(v 7 -v 8 ) 1250/2750 760/2432 r21 200 152 16h 010110 v 22 '' v 8 +(v 7 -v 8 ) 1450/2750 912/2432 r22 200 152 17h 010111 v 23 '' v 8 +(v 7 -v 8 ) 1650/2750 1064/2432 r23 150 152 18h 011000 v 24 '' v 8 +(v 7 -v 8 ) 1800/2750 1216/2432 r24 150 152 19h 011001 v 25 '' v 8 +(v 7 -v 8 ) 1950/2750 1368/2432 r25 150 152 1ah 011010 v 26 '' v 8 +(v 7 -v 8 ) 2100/2750 1520/2432 r26 150 152 1bh 011011 v 27 '' v 8 +(v 7 -v 8 ) 2250/2750 1672/2432 r27 100 152 1ch 011100 v 28 '' v 8 +(v 7 -v 8 ) 2350/2750 1824/2432 r28 100 152 1dh 011101 v 29 '' v 8 +(v 7 -v 8 ) 2450/2750 1976/2432 r29 100 152 1eh 011110 v 30 '' v 8 +(v 7 -v 8 ) 2550/2750 2128/2432 r30 100 152 1fh 011111 v 31 '' v 8 +(v 7 -v 8 ) 2650/2750 2280/2432 r31 100 152 20h 100000 v 32 '' v 7 r32 100 156 21h 100001 v 33 '' v 7 +(v 6 -v 7 ) 100/1600 156/2496 r33 100 156 22h 100010 v 34 '' v 7 +(v 6 -v 7 ) 200/1600 312/2496 r34 100 156 23h 100011 v 35 '' v 7 +(v 6 -v 7 ) 300/1600 468/2496 r35 100 156 24h 100100 v 36 '' v 7 +(v 6 -v 7 ) 400/1600 624/2496 r36 100 156 25h 100101 v 37 '' v 7 +(v 6 -v 7 ) 500/1600 780/2496 r37 100 156 26h 100110 v 38 '' v 7 +(v 6 -v 7 ) 600/1600 936/2496 r38 100 156 27h 100111 v 39 '' v 7 +(v 6 -v 7 ) 700/1600 1092/2496 r39 100 156 28h 101000 v 40 '' v 7 +(v 6 -v 7 ) 800/1600 1248/2496 r40 100 156 29h 101001 v 41 '' v 7 +(v 6 -v 7 ) 900/1600 1404/2496 r41 100 156 2ah 101010 v 42 '' v 7 +(v 6 -v 7 ) 1000/1600 1560/2496 r42 100 156 2bh 101011 v 43 '' v 7 +(v 6 -v 7 ) 1100/1600 1716/2496 r43 100 156 2ch 101100 v 44 '' v 7 +(v 6 -v 7 ) 1200/1600 1872/2496 r44 100 156 2dh 101101 v 45 '' v 7 +(v 6 -v 7 ) 1300/1600 2028/2496 r45 100 156 2eh 101110 v 46 '' v 7 +(v 6 -v 7 ) 1400/1600 2184/2496 r46 100 156 2fh 101111 v 47 '' v 7 +(v 6 -v 7 ) 1500/1600 2340/2496 r47 100 156 30h 110000 v 48 '' v 6 r48 100 175 31h 110001 v 49 '' v 6 +(v 5 -v 6 ) 100/3450 175/4572 r49 100 175 32h 110010 v 50 '' v 6 +(v 5 -v 6 ) 200/3450 350/4572 r50 100 175 33h 110011 v 51 '' v 6 +(v 5 -v 6 ) 300/3450 525/4572 r51 100 175 34h 110100 v 52 '' v 6 +(v 5 -v 6 ) 400/3450 700/4572 r52 100 175 35h 110101 v 53 '' v 6 +(v 5 -v 6 ) 500/3450 875/4572 r53 150 232 36h 110110 v 54 '' v 6 +(v 5 -v 6 ) 650/3450 1107/4572 r54 150 232 37h 110111 v 55 '' v 6 +(v 5 -v 6 ) 800/3450 1339/4572 r55 150 232 38h 111000 v 56 '' v 6 +(v 5 -v 6 ) 950/3450 1571/4572 r56 200 232 39h 111001 v 57 '' v 6 +(v 5 -v 6 ) 1150/3450 1803/4572 r57 200 289 3ah 111010 v 58 '' v 6 +(v 5 -v 6 ) 1350/3450 2092/4572 r58 250 345 3bh 111011 v 59 '' v 6 +(v 5 -v 6 ) 1600/3450 2437/4572 r59 250 402 3ch 111100 v 60 '' v 6 +(v 5 -v 6 ) 1850/3450 2839/4572 r60 300 402 3dh 111101 v 61 '' v 6 +(v 5 -v 6 ) 2150/3450 3241/4572 r61 500 459 3eh 111110 v 62 '' v 6 +(v 5 -v 6 ) 2650/3450 3700/4572 r62 800 872 3fh 111111 v 63 '' v 5 rtotal 15850 15851 caution there is no connection between v 4 and v 5 terminal in the chip. v 17 '' v 0 '' v 16 '' v 15 '' v 2 '' v 1 '' v 63 '' v 62 '' v 61 '' v 49 '' v 48 '' v 47 '' r61 r60 r59 r49 r48 r47 r46 v 6 r62 v 5 r17 r0 r16 r15 r14 r2 r1 v 9 v 8 v 60 '' data sheet s13972ej3v0ds00 9 m m m m pd16732a, 16732b 6. relationship between input data and output pin data format: 6 bits 2 rgbs (6 dots) input width : 36 bits (2-pixel data) r,/l = h (right shift) output s 1 s 2 s 3 s 4 xxx s 383 s 384 data d 00 to d 05 d 10 to d 15 d 20 to d 25 d 30 to d 35 xxx d 40 to d 45 d 50 to d 55 r,/l = l (left shift) output s 1 s 2 s 3 s 4 xxx s 383 s 384 data d 00 to d 05 d 10 to d 15 d 20 to d 25 d 30 to d 35 xxx d 40 to d 45 d 50 to d 55 pol s 2nC1 note s 2n note lv 0 to v 4 v 5 to v 9 hv 5 to v 9 v 0 to v 4 note s 2n-1 (odd output), s 2n (even output) 7. relationship between stb, pol and output waveform the output voltage is written to the lcd panel synchronized with the stb falling edge. selected voltage v 0 to v 4 hi-z stb pol s 2n s 2n-1 hi-z hi-z selected voltage v 5 to v 9 selected voltage v 0 to v 4 selected voltage v 0 to v 4 selected voltage v 5 to v 9 selected voltage v 5 to v 9 h data sheet s13972ej3v0ds00 10 m m m m pd16732a, 16732b 8. relationship between stb, clk, and output waveform the output voltage is written to the lcd panel synchronized with the stb falling edge. figure 8 - - - - 1. output circuit block diagram dac + output amp sw1 v out v amp(in) - figure 8 - - - - 2. output circuit timing waveform stb (external input) v out (external output) clk (external input) v amp(in) hi-z output output sw1 : on sw1 : off sw1 : on [1] [2] remarks 1. stb = l : sw1 = on stb = h : sw1 = off 2. stb = h is acknowledged at timing [1]. 3. the display data latch is completed at timing [2] and the input voltage (vamp (in) : gray-scale level voltage) of the output amplifier changes. data sheet s13972ej3v0ds00 11 m m m m pd16732a, 16732b 9. current consumption reduction function the m pd16732a and 16732b have a low power control function (lpc) which can switch the bias current of the output amplifier between two levels and a bias control function (bcont) which can be used to finely control the bias current. data sheet s13972ej3v0ds00 12 m m m m pd16732a, 16732b figure9 - - - - 2. output wave form (lpc = l) bcont = open output voltage(1 v/div) time (4 m s / div) bcont = 1.0 k w bcont = 10 k w bcont = 50 k w [1] [2] data sheet s13972ej3v0ds00 13 m m m m pd16732a, 16732b figure9 - - - - 3. output wave form (lpc = h) bcont = open time (4 output voltage(1 v/div) m s / div) bcont = 1.0 k w bcont = 10 k w bcont = 50 k w data sheet s13972ej3v0ds00 14 m m m m pd16732a, 16732b 10. electrical specifications absolute maximum ratings (t a = +25 c, v ss1 = v ss2 = 0 v) parameter symbol rating unit logic part supply voltage v dd1 C0.5 to +4.0 v driver part supply voltage v dd2 C0.5 to +10.0 v logic part input voltage v i1 C0.5 to v dd1 + 0.5 v driver part input voltage v i2 C0.5 to v dd2 + 0.5 v logic part output voltage v o1 C0.5 to v dd1 + 0.5 v driver part output voltage v o2 C0.5 to v dd2 + 0.5 v operating ambient temperature t a C10 to +75 c storage temperature t stg C55 to +125 c caution if the absolute maximum rating of even one of the above parameters is exceeded even momentarily, the quality of the product may be degraded. absolute maximum ratings, therefore, specify the values exceeding which the product may be physically damaged. be sure to use the product within the range of the absolute maximum ratings. recommended operating range (t a = C10 to +75 c, v ss1 = v ss2 = 0 v) parameter symbol conditions min. typ. max. unit logic part supply voltage v dd1 2.3 3.6 v driver part supply voltage v dd2 8.0 8.5 9.0 v high-level input voltage v ih 0.7 v dd1 v dd1 v low-level input voltage v il 0 0.3 v dd1 v g -corrected voltage v 0 to v 9 v ss2 + 0.1 v dd2 - 0.1 v driver part output voltage v o v ss2 + 0.1 v dd2 - 0.1 v v dd1 = 2.3 v to 3.6 v 45 mhz maximum clock frequency f max. v dd1 = 3.0 v to 3.6 v 65 mhz data sheet s13972ej3v0ds00 15 m m m m pd16732a, 16732b electrical characteristics (t a = C10 to +75 c, v dd1 = 2.3 v to 3.6 v, v dd2 = 8.5 v 0.5 v, v ss1 = v ss2 = 0 v, unless otherwise specified, the input level is defined to be lpc = h or open, bcont = open) parameter symbol condition min. typ. max. unit input leak current i il 1.0 m a high-level output voltage v oh sthr (sthl), i oh = 0 ma v dd1 - 0.1 v low-level output voltage v ol sthr (sthl), i ol = 0 ma 0.1 v v 0 pin, v 5 pin 126 252 504 m a g -corrected supply current i g v 0 to v 4 = v 5 to v 9 = 4.0 v v 4 pin, v 9 pin C504 C252 C126 m a i voh v x = 7.0 v, v out = 6.5 v note C30 m a driver output current i vol v x = 1.0 v, v out = 1.5 v note 30 m a output voltage deviation d v o 7 20 mv output swing difference deviation d v pCp v dd1 = 3.3 v, v dd2 = 8.5 v, v out = 2.0 v, 4.25 v, 6.5 v 2 15 mv output voltage range v o all input data 0.1 v dd2 C 0.1 v logic part dynamic current consumption i dd1 v dd1, with no load 3.0 6.0 ma i dd21 v dd2 = 8.5 v 0.5 v, with no load lpc = h, bcont = open 3.0 6.0 ma driver part dynamic current consumption i dd22 v dd2 = 8.5 v 0.5 v, with no load lpc = l, bcont = open 2.0 4.0 ma notes1. v x refers to the output voltage of analog output pins s 1 to s 384 . 2. v out refers to the voltage applied to analog output pins s 1 to s 384 . cautions 1. the stb cycle is defined to be 20 m m m m s at f clk = 40 mhz. 2. the typ. values refer to an all black or all white input pattern. the max. value refers to the measured values in the dot checkerboard input pattern. 3. refers to the current consumption per driver when cascades are connected under the assumption of xga single-sided mounting (8 units). data sheet s13972ej3v0ds00 16 m m m m pd16732a, 16732b switching characteristics (t a = C10 to +75 c, v dd1 = 2.3 v to 3.6 v, v dd2 = 8.5 v 0.5 v, v ss1 = v ss2 = 0 v, unless otherwise specified, the input level is defined to be lpc = h or open, bcont = open) parameter symbol condition min. typ. max. unit c l = 10 pf, v dd1 = 2.3 v to 3.6 v 10 17 ns start pulse delay time t plh1 c l = 10 pf, v dd1 = 3.0 v to 3.6 v 7 10.5 ns t plh2 2.5 5 m s t plh3 58 m s t phl2 2.5 5 m s driver output delay time t phl3 c l = 75 pf, r l = 5 k w 58 m s c i1 sthr (sthl) excluded, t a = +25c 510pf input capacitance c i2 sthr (sthl),t a = +25c 8 10 pf data sheet s13972ej3v0ds00 17 m m m m pd16732a, 16732b timing requirement (t a = C10 to +75 c, v dd1 = 2.3 v to 3.6 v, v ss1 = v ss2 = 0 v, t r = t f = 8.0 ns) parameter symbol condition min. typ. max. unit v dd1 = 2.3 v to 3.6 v 22 ns clock pulse width pw clk v dd1 = 3.0 v to 3.6 v 15 ns clock pulse high period pw clk(h) 4ns v dd1 = 2.3 v to 3.6 v 6 ns clock pulse low period pw clk(l) v dd1 = 3.0 v to 3.6 v 4 ns data setup time t setup1 4ns data hold time t hold1 0ns start pulse setup time t setup2 4ns start pulse hold time t hold2 0ns pol2 setup time t setup3 4ns pol2 hold time t hold3 0ns start pulse low period t spl 6ns 2clk stb pulse width pw stb 4 m s data invalid period t inv 1clk last data timing t ldt 2clk clk-stb time t clk-stb clk - ? stb - 6ns stb - ? clk - v dd1 = 2.3 v to 3.6 v 9ns stb-clk time t stb-clk stb - ? clk - v dd1 = 3.0 v to 3.6 v 6ns time between stb and start pulse t stb-sth stb - ? sthr(sthl) - 2clk pol-stb time t pol-stb pol - or ? stb - C5 ns stb-pol time t stb-pol stb ? pol or - 6ns ? data sheet s13972ej3v0ds00 18 m m m m pd16732a, 16732b 11. switching characteristics waveform unless otherwise specified, the input level is defined to be v ih = 0.7 v dd1 , v il = 0.3 v dd1 . pw clk(l) clk pol v out stb d n0 to d n5 sthr sthl pw clk(h) t r t setup2 invalid d 1 to d 6 t hold2 12 12 3646566 513 514 t f v dd1 v ss1 v dd1 v ss1 v dd1 v ss1 v dd1 v ss1 v dd1 v ss1 v dd1 v ss1 pw clk t clk-stb t stb-clk t stb-sth t setup1 90% 10% t hold1 t plh1 t inv t pol-stb t stb-pol t plh3 t plh2 t phl2 t phl3 hi-z target voltage +0.1 v dd2 6-bit accuracy t ldt pw stb d 7 to d 12 d 1 -d 6 d 7 -d 12 d 373 to d 378 d 379 to d 384 d 385 to d 390 d 3067 to d 3072 invalid invalid v dd1 v ss1 t spl t setup3 t hold3 pol2 (1st dr.) (1st dr.) invalid ? data sheet s13972ej3v0ds00 19 m m m m pd16732a, 16732b 12. recommended soldering conditions the following conditions must be met for soldering conditions of the m pd16732a, 16732b. for more details, refer to the semiconductor device mounting technology manual (c10535e). please consult with our sales offices in case other soldering process is used, or in case the soldering is done under different conditions. m m m m pd16732an-xxx, m m m m pd16732bn- : tcp (tab package) mounting condition mounting method condition soldering heating tool 300 to 350c: heating for 2 to 3 seconds: pressure 100g (per solder) thermocompression acf (adhesive conductive film) temporary bonding 70 to 100c: pressure 3 to 8 kg/cm 2 : time 3 to 5 seconds. real bonding 165 to 180c: pressure 25 to 45 kg/cm 2 : time 30 to 40 seconds. (when using the anisotropy conductive film sumizac1003 of sumitomo bakelite, ltd.) caution to find out the detailed conditions for packaging the acf part, please contact the acf manufacturing company. be sure to avoid using two or more packaging methods at a time. data sheet s13972ej3v0ds00 20 m m m m pd16732a, 16732b [memo] data sheet s13972ej3v0ds00 21 m m m m pd16732a, 16732b [memo] data sheet s13972ej3v0ds00 22 m m m m pd16732a, 16732b [memo] data sheet s13972ej3v0ds00 23 m m m m pd16732a, 16732b notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. production process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed immediately after power-on for devices having reset function. m m m m pd16732a, 16732b reference documents nec semiconductor device reliability / quality control system (c10983e) quality grades to necs semiconductor devices (c11531e) the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec corporation. nec corporation assumes no responsibility for any errors which may appear in this document. nec corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. no license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec corporation or others. descriptions of circuits, software, and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software, and information in the design of the customer's equipment shall be done under the full responsibility of the customer. nec corporation assumes no responsibility for any losses incurred by the customer or third parties arising from the use of these circuits, software, and information. while nec corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. to minimize risks of damage or injury to persons or property arising from a defect in an nec semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. nec devices are classified into the following three quality grades: "standard", "special", and "specific". the specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. the recommended applications of a device depend on its quality grade, as indicated below. customers must check the quality grade of each device before using it in a particular application. standard: computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots special: transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) specific: aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. the quality grade of nec devices is "standard" unless otherwise specified in nec's data sheets or data books. if customers intend to use nec devices for applications other than those specified for standard quality grade, they should contact an nec sales representative in advance. m7 98. 8 |
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